NCP1651DR2G【PDF 23/32 页】IC PFC CONTROLLER CCM/DCM 16SOIC

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Sheet目录45

19页 20页 21页 22页 [23页]24页 25页 26页 27页

NCP1651

http://onsemi.com

allows for a repeatable, fast restart. See Figure 3 for timing

diagram.

The unit will remain operational as long as the V

voltageremainsabovetheUVLOundervoltagetrippoint.If

the V

voltage is reduced to the undervoltage trip point,

operationoftheunitwillbedisabled,thestartupcircuitwill

againbeenabled,andwillchargetheV

capuptotheturn

onvoltagelevel.Atthispointthestartupcircuitwillturnoff

and the unit will remain in the shutdown mode. This will

continue for the next seven cycles. On the eighth cycle, the

NPC1651willagainbecomeoperational.IftheV

voltage

remains above the undervoltage trip point the unit will

continue to operate, if not the unit will begin another

divide- -by- -eight cycle.

The purpose of the divide- -by- -eight counter is to reduce

thepowerdissipationofthechipunder overloadconditions

and allow it to recycle indefinitely without overheating the

chip.

Itiscriticalthattheoutputvoltagereachesalevelthatallows

theauxiliaryvoltagetoremainabovetheUVLOturn- -offlevel

before the V

cap has discharged to that level. If the bias

voltage generated by the inductor winding fails to exceed the

shutdown voltage before the capacitor reduces to the UVLO

undervoltageturn- -offlevel,theunitwillshutdownandgointo

adivide- -by- -eightcycle,andwillneverstart.Ifthisoccurs,the

capacitor value should be increased.

Soft- -Start Circuit

The AC error amplifier has been configured such that a

low output level will cause the output duty cycle to go to

zero. This will have the effect of soft- -starting the unit at

turn- -on, since the output is coupled to ground through a

capacitor.

There will be an initial offset of the output voltage due to

the output current and the resistor at pin 11. For example, if

the output is saturated in the high state at turn on, it will

source 50 mA. If pin 11 is terminated with a 2.2 k?resistor

and a 0.01 F capacitor, the initial step will be:

50 mA ?2.2 k = 0.11 volts

and the rate of rise will be:

50 mA0.01 mF = 5 mVms

or,560msuntiltheoutputisat2.8volts,whichcorresponds

to full duty cycle.

There is also a clamp on pin 8 that will keep the

capacitance on that pin discharged to 1.5 volts so that the

FB/SD signal will also slew up from a low power level to a

high power level. When the unit is in standby mode, the

clamp will be enabled. At the same time as the unit is

enabled, the clamp will be disabled to allow the feedback

signal to control the loop.

An external soft- -start circuit can be added, as shown in

Figure 24, if additional time is desired.

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